TOBOL - a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The TOBOL methodology for hardware description from top to bottom level is proposed. Multilevel circuit descriptions can efficiently be provided for diversified purposes. Low-level (such as transistor-level) design information can easily be attached into high-level descriptions. TOBOL utilizes consistent data representations at different levels and allows the integration of circuit descriptions at different levels into a single unified system. Therefore, redundant information is greatly reduced, and efficient access of right functional abstractions of circuits is achieved.

Original languageEnglish (US)
Title of host publicationInt Conf on Comput Lang 1988 Proc
PublisherIEEE Computer Society
Pages404-411
Number of pages8
ISBN (Print)0818608749
StatePublished - Dec 1 1988

Publication series

NameInt Conf on Comput Lang 1988 Proc

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chen, C. Y. R. (1988). TOBOL - a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems. In Int Conf on Comput Lang 1988 Proc (pp. 404-411). (Int Conf on Comput Lang 1988 Proc). IEEE Computer Society.