Technique for 1-dimensional VLSI layout generation

U. Singh, C. Y.R. Chen

Research output: Contribution to journalArticlepeer-review


The layout and synthesis system RESCUE presented by Shaw et al. is briefly reviewed. It is a system for implementing random logic using an array layout style. RTL equations are realized by a horizontal row of cells which may contain both static and dynamic circuits. Signals are carried by polysilicon lines in horizontal rows. Algorithmic improvements are suggested in three areas. First, the mincut algorithm is proposed for the cell-assignment problem. Secondly, a new algorithm is presented which determines a placement for the polysilicon lines in a way that allows narrower cells to be designed. Another algorithm based on a technique developed by the authors is proposed for designing cells so as to optimize their areas. The complexity of the final set of algorithms is O(E log E) where E is the number of RTL equations. Improvements range from 5.5% to 50%.

Original languageEnglish (US)
Pages (from-to)635-645
Number of pages11
JournalIEE Proceedings, Part G: Circuits, Devices and Systems
Issue number6
StatePublished - 1992

ASJC Scopus subject areas

  • General Engineering


Dive into the research topics of 'Technique for 1-dimensional VLSI layout generation'. Together they form a unique fingerprint.

Cite this