Strongly secure and efficient data shuffle on hardware enclaves

Ju Chen, Yuzhe Tang, Hao Zhou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Mitigating memory-Access attacks on the Intel SGX architecture is an important and open research problem. A natural notion of the mitigation is cache-miss obliviousness which requires the cache-misses emitted during an enclave execution are oblivious to sensitive data. This work realizes the cachemiss obliviousness for the computation of data shuffling. The proposed approach is to software-engineer the oblivious algorithm of Melbourne shuffle [22] on the Intel SGX/TSX architecture, where the Transaction Synchronization eXtension (TSX) is (ab)used to detect the occurrence of cache misses. In the system building, we propose software techniques to prefetch memory data prior to the TSX transaction to defend the physical bus-Tapping attacks. Our evaluation based on real implementation shows that our system achieves superior performance and lower transaction abort rate than the related work in the existing literature.

Original languageEnglish (US)
Title of host publicationSysTEX 2017 - 2nd Workshop on System Software for Trusted Execution, Colocated with ACM SOSP 2017
PublisherAssociation for Computing Machinery, Inc
ISBN (Electronic)9781450350976
DOIs
StatePublished - Oct 28 2017
Event2nd Workshop on System Software for Trusted Execution, SysTex 207 - Shanghai, China
Duration: Oct 28 2017 → …

Other

Other2nd Workshop on System Software for Trusted Execution, SysTex 207
CountryChina
CityShanghai
Period10/28/17 → …

ASJC Scopus subject areas

  • Software
  • Computer Networks and Communications

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  • Cite this

    Chen, J., Tang, Y., & Zhou, H. (2017). Strongly secure and efficient data shuffle on hardware enclaves. In SysTEX 2017 - 2nd Workshop on System Software for Trusted Execution, Colocated with ACM SOSP 2017 [a1] Association for Computing Machinery, Inc. https://doi.org/10.1145/3152701.3152708