## Abstract

The future of computational electromagnetics is changing drastically with the new generation of computer chips, which are multi-cored instead of single-cored. Previously, advancements in chip technology meant an increase in clock speed, which was typically a benefit that computational code users could enjoy. This is no longer the case. In the new roadmaps for chip manufacturers, speed has been sacrificed for improved power consumption, and the direction is multi-core processors. The burden now falls on the software programmer to revamp existing codes and add new functionality to enable computational codes to run efficiently on this new generation of multi-core processors. In this paper, a new roadmap for computational code designers is provided, demonstrating how to navigate along with the chip designers through the multi-core advancements in chip design. A new parallel code, using the Method of Moments (MoM) and higher-order functions for expansion and testing, and executed on a range of computer platforms, will illustrate this roadmap. The advantage of a higher-order basis over a subdomain basis is a reduction in the number of unknowns. This means that with the same computer resources, a larger problem can be solved using higher-order basis than using a subdomain basis. The matrix filling for MoM with subdomain basis must be programmed with multiple loops over the edges of the patches to account for the interactions. However, higherorder basis functions, such as polynomials, can be calculated more efficiently with fewer integrations, at least for the senial code. In terms of parallel integral-equation solvers, the differences between these categories of basis functions must be understood and accommodated. If computational codes are not written properly for parallel operation,taking into account the central processing unit (CPU) architecture and operating system, the result will be an extremely inefficient code. The research presented here will show how to take the shortest route to an efficient parallel electromagnetic (EM) code. The key for excellent parallel in-core code performance is to reduce redundancy and to obtain proper load balancing, so that all the processor cores are fully utilized. This is particularly important, since even a desktop computer or workstation can now have four or eight processor cores in just two CPU sockets. The parallel in-core solver uses RAM memory, which is often expensive and limited. The parallel out-of-core solver is introduced to extend the capability of this MoM code to solve larger problems, constrained only by the amount of inexpensive hard-disk storage. This paper demonstrates that the implementation of these techniques for parallel integral-equation solver codes, combined with the new chip technology, creates a powerful new tool for efficient computational electromagnetics solution of complex real-world problems. Numerical examples also illustrate that if the parallel coding is implemented appropriately, then for computationally intensive problems like the solution of matrix equations, it is possible to obtain comparable execution times using either the in-core or out-of-core mode.

Original language | English (US) |
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Pages (from-to) | 13-30 |

Number of pages | 18 |

Journal | IEEE Antennas and Propagation Magazine |

Volume | 50 |

Issue number | 4 |

DOIs | |

State | Published - Aug 2008 |

## Keywords

- Computation time
- Computational electromagnetics
- Electrically large objects
- In-core solver
- Moment methods
- Out-of-core solver
- Parallel algorithms
- Parallel architectures
- Parallel processing
- Parallel programming
- Radar cross section
- Vivaldi antennas

## ASJC Scopus subject areas

- Condensed Matter Physics
- Electrical and Electronic Engineering