TY - GEN
T1 - Semi-analytical current source modeling of FinFET devices operating in near/sub-threshold regime with independent gate control and considering process variation
AU - Cui, Tiansong
AU - Wang, Yanzhi
AU - Lin, Xue
AU - Nazarian, Shahin
AU - Pedram, Massoud
PY - 2014
Y1 - 2014
N2 - Operating circuits in the near/sub-threshold regime can lower the circuit energy consumption at the expense of lowering the circuit speed. In addition near/sub-threshold can result in higher sensitivity to process-induced variations and transient noise. FinFETs have been proposed as an alternative to planar CMOS devices in sub-20nm CMOS technology nodes due to their more effective channel control, steep sub-threshold slope, high ON/OFF current ratio, low power consumption, and so on. Characteristics of FinFETs operating in the near/sub-threshold regime make it difficult to verify the timing of a circuit using conventional statistical static timing analysis (SSTA) techniques. Current source modeling (CSM) methods, which have been proposed to increase the accuracy of timing analysis in dealing with arbitrary shapes of the input signal waveforms, are the appropriate solution for performing SSTA on FinFET-based circuits. This paper thus extends the CSM to such circuits, operating in the near/sub-threshold voltage regime. In particular, FinFET devices with independent gate control and subject to process variations are modelled. The key idea of the proposed CSM approach is to combine non-linear analytical models and low-dimensional CSM lookup tables to simultaneously achieve high modeling accuracy and low time/space complexity.
AB - Operating circuits in the near/sub-threshold regime can lower the circuit energy consumption at the expense of lowering the circuit speed. In addition near/sub-threshold can result in higher sensitivity to process-induced variations and transient noise. FinFETs have been proposed as an alternative to planar CMOS devices in sub-20nm CMOS technology nodes due to their more effective channel control, steep sub-threshold slope, high ON/OFF current ratio, low power consumption, and so on. Characteristics of FinFETs operating in the near/sub-threshold regime make it difficult to verify the timing of a circuit using conventional statistical static timing analysis (SSTA) techniques. Current source modeling (CSM) methods, which have been proposed to increase the accuracy of timing analysis in dealing with arbitrary shapes of the input signal waveforms, are the appropriate solution for performing SSTA on FinFET-based circuits. This paper thus extends the CSM to such circuits, operating in the near/sub-threshold voltage regime. In particular, FinFET devices with independent gate control and subject to process variations are modelled. The key idea of the proposed CSM approach is to combine non-linear analytical models and low-dimensional CSM lookup tables to simultaneously achieve high modeling accuracy and low time/space complexity.
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U2 - 10.1109/ASPDAC.2014.6742884
DO - 10.1109/ASPDAC.2014.6742884
M3 - Conference contribution
AN - SCOPUS:84897873882
SN - 9781479928163
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 167
EP - 172
BT - 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings
T2 - 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014
Y2 - 20 January 2014 through 23 January 2014
ER -