TY - GEN
T1 - Scalable Quantum Computing Infrastructure Based on Superconducting Electronics
AU - Mukhanov, O.
AU - Plourde, B. L.T.
AU - Opremcak, A.
AU - Liu, C. H.
AU - McDermott, R.
AU - Kirichenko, A.
AU - Howington, C.
AU - Walter, J.
AU - Hutchings, M.
AU - Vernik, I.
AU - Yohannes, D.
AU - Dodge, K.
AU - Ballard, A.
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/12
Y1 - 2019/12
N2 - An approach for scalable quantum computing infrastructure based on the use of low-power digital superconducting single flux quantum (SFQ) circuits is described. Rather than replicating the room-temperature microwave control and measurement infrastructure solutions dominating the current systems, we use the inherent to superconducting technology methods - the use of SFQ pulses directly at the base temperature. For qubit control, we irradiate qubits with the coherent SFQ pulse sequences computed using optical control theory. For qubit measurement, Josephson photon counter performs projective quantum measurement, the result of which is converted to digital SFQ output. These operations are aided by a high-speed digital SFQ coprocessor located at higher temperature stage (e.g., 3 K) to process the measurement results and load new control sequences to 20 mK SFQ quantum-classical interface circuits.
AB - An approach for scalable quantum computing infrastructure based on the use of low-power digital superconducting single flux quantum (SFQ) circuits is described. Rather than replicating the room-temperature microwave control and measurement infrastructure solutions dominating the current systems, we use the inherent to superconducting technology methods - the use of SFQ pulses directly at the base temperature. For qubit control, we irradiate qubits with the coherent SFQ pulse sequences computed using optical control theory. For qubit measurement, Josephson photon counter performs projective quantum measurement, the result of which is converted to digital SFQ output. These operations are aided by a high-speed digital SFQ coprocessor located at higher temperature stage (e.g., 3 K) to process the measurement results and load new control sequences to 20 mK SFQ quantum-classical interface circuits.
UR - http://www.scopus.com/inward/record.url?scp=85081043755&partnerID=8YFLogxK
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U2 - 10.1109/IEDM19573.2019.8993634
DO - 10.1109/IEDM19573.2019.8993634
M3 - Conference contribution
AN - SCOPUS:85081043755
T3 - Technical Digest - International Electron Devices Meeting, IEDM
BT - 2019 IEEE International Electron Devices Meeting, IEDM 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 65th Annual IEEE International Electron Devices Meeting, IEDM 2019
Y2 - 7 December 2019 through 11 December 2019
ER -