Abstract
Datapath layout designs exhibit special layout properties in that most wires connect one stage to another and are straight wires. Use of track based routing algorithms suffices for the routing needs of the bit-lines. The left edge algorithm (LEA) may be used for this purpose. With the increase in performance requirements for deep sub-micron datapath designs, the use of nonuniform wire widths and spacing is becoming necessary and using LEA is not feasible. This paper defines the datapath bit-line assignment problem. We then present a heuristic algorithm that achieves optimal results in most test cases when the wire widths are nonuniform. The time complexity of our solution is O(NlogN), where N is the number of bit-wire segments to be assigned.
Original language | English (US) |
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Title of host publication | Proceedings of the International Conference on Microelectronics, ICM |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 85-88 |
Number of pages | 4 |
Volume | 2000-January |
ISBN (Print) | 0780366433 |
DOIs | |
State | Published - 1999 |
Event | 11th International Conference on Microelectronics, ICM 1999 - Kuwait City, Kuwait Duration: Nov 22 1999 → Nov 24 1999 |
Other
Other | 11th International Conference on Microelectronics, ICM 1999 |
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Country/Territory | Kuwait |
City | Kuwait City |
Period | 11/22/99 → 11/24/99 |
Keywords
- Crosstalk
- Data engineering
- Delay
- Design engineering
- Educational institutions
- Heuristic algorithms
- Routing
- Signal design
- Testing
- Wires
ASJC Scopus subject areas
- Electrical and Electronic Engineering