Profiling and comparison of internal electrical environments of p and n-channel SOI MOSFETs

J. Mody, A. Venkatachalam, O. Rodrigues, S. Jambulingam, Prasanta K Ghosh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Internal electrical environment of p-channel SOI MOSFET is simulated and compared with the properties of n-channel SOI MOSFET. Electrical characteristics are modified due to the charge redistribution resulting from the applied bias voltage. Effects of channel shrinkage, for both n- and p-channel have been documented.

Original languageEnglish (US)
Title of host publication2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages259-262
Number of pages4
ISBN (Print)0780377494, 9780780377493
DOIs
StatePublished - 2003
EventIEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 - Tsimshatsui, Kowloon, Hong Kong
Duration: Dec 16 2003Dec 18 2003

Other

OtherIEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003
CountryHong Kong
CityTsimshatsui, Kowloon
Period12/16/0312/18/03

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Mody, J., Venkatachalam, A., Rodrigues, O., Jambulingam, S., & Ghosh, P. K. (2003). Profiling and comparison of internal electrical environments of p and n-channel SOI MOSFETs. In 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 (pp. 259-262). [1283527] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2003.1283527