Abstract
Internal electrical environment of p-channel SOI MOSFET is simulated and compared with the properties of n-channel SOI MOSFET. Electrical characteristics are modified due to the charge redistribution resulting from the applied bias voltage. Effects of channel shrinkage, for both n- and p-channel have been documented.
Original language | English (US) |
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Title of host publication | 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 259-262 |
Number of pages | 4 |
ISBN (Print) | 0780377494, 9780780377493 |
DOIs | |
State | Published - 2003 |
Event | IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 - Tsimshatsui, Kowloon, Hong Kong Duration: Dec 16 2003 → Dec 18 2003 |
Other
Other | IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 |
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Country/Territory | Hong Kong |
City | Tsimshatsui, Kowloon |
Period | 12/16/03 → 12/18/03 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering