Because of their many attractive attributes, FinFETs are emerging as the device of choice for CMOS process technology nodes below 20nm. This paper is the first work that investigates the effectiveness of building CMOS circuits operating in the near-threshold regime and above with 7nm FinFET technology through a cross-layer design and simulation framework. Three types of FinFET devices with different threshold voltages are designed using Sentaurus TCAD to accommodate the need for constructing both high-speed cells and low-power cells in the same library. Compact and SPICE-compatible device models are extracted with high accuracy using current source modeling techniques. Standard cell libraries with two different (near-and super-threshold) supply voltages are generated. Circuit syntheses are performed on extensive benchmarks to compare the performance with the state-of-the-art planar CMOS counterparts. Simulation results demonstrate the benefit of 7nm FinFET-based circuits from both aspects of speed and energy efficiency.