Optimal choice of FinFET devices for energy minimization in deeply-scaled technologies

Mohammad Saeed Abrishami, Alireza Shafaei, Yanzhi Wang, Massoud Pedram

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

FinFET devices are considered to be the device substitute for bulk CMOS in sub-20nm technology nodes due to the reduced short-channel effects, improved ON/OFF current ratio, and improved voltage scalability. This paper investigates the problem of optimal selection of deeply-scaled FinFET technology to achieve minimum energy consumption for different applications such as sensor applications, smartphones, embedded micro-processors, or server micro-processors, which differ in the required performance and duty ratio. For each application space, different FinFET technologies (with different Vth and gate length biases) are compared in term of minimum energy consumption for both logic circuits and cache memories. A device-circuit-architecture cross-layer framework has been developed to facilitate this technology selection. This optimal technology selection procedure demonstrates up to 11× energy saving compared to poorly selected technologies.

Original languageEnglish (US)
Title of host publicationProceedings - International Symposium on Quality Electronic Design, ISQED
PublisherIEEE Computer Society
Pages234-238
Number of pages5
Volume2015-April
ISBN (Print)9781479975815
DOIs
StatePublished - Apr 13 2015
Externally publishedYes
Event16th International Symposium on Quality Electronic Design, ISQED 2015 - Santa Clara, United States
Duration: Mar 2 2015Mar 4 2015

Other

Other16th International Symposium on Quality Electronic Design, ISQED 2015
CountryUnited States
CitySanta Clara
Period3/2/153/4/15

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Abrishami, M. S., Shafaei, A., Wang, Y., & Pedram, M. (2015). Optimal choice of FinFET devices for energy minimization in deeply-scaled technologies. In Proceedings - International Symposium on Quality Electronic Design, ISQED (Vol. 2015-April, pp. 234-238). [7085431] IEEE Computer Society. https://doi.org/10.1109/ISQED.2015.7085431