Memristor-based discrete fourier transform for improving performance and energy efficiency

Ruizhe Cai; Ao Ren; Yanzhi Wang; Bo Yuan

doi:10.1109/ISVLSI.2016.124

Memristor-based discrete fourier transform for improving performance and energy efficiency

Ruizhe Cai, Ao Ren, Yanzhi Wang, Bo Yuan

Department of Electrical Engineering & Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

Memristor has emerged as one of the most promising candidates for the fundamental device in the beyond-CMOS era. With their unique advantage on implementing low-power high-speed matrix multiplication, memristors have shown great and vast potentiality in many specific applications. This paper, for the first time, investigates the hardware design of DFT using memristors. Two implementations of DFT using memristors have been presented for effectively trading-off between hardware complexity and computing speed. Simulation results show that as compared to the conventional CMOS-based design, the proposed memristor-based design enables significant reduction in computation latency and improvement in power efficiency with very low inaccuracy. Simulation results show that the proposed memristor-based implementation could reach up to 10X improvement in speed and 109.8X reduction in power efficiency compared to CMOS-based design.

Original language	English (US)
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Publisher	IEEE Computer Society
Pages	643-648
Number of pages	6
Volume	2016-September
ISBN (Electronic)	9781467390385
DOIs	https://doi.org/10.1109/ISVLSI.2016.124
State	Published - Sep 2 2016
Event	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 - Pittsburgh, United States Duration: Jul 11 2016 → Jul 13 2016

Other

Other	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Country/Territory	United States
City	Pittsburgh
Period	7/11/16 → 7/13/16

Keywords

DFT
Memristor
Memristor Crossbar

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/ISVLSI.2016.124

Cite this

Memristor-based discrete fourier transform for improving performance and energy efficiency. / Cai, Ruizhe; Ren, Ao; Wang, Yanzhi; Yuan, Bo.

Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. Vol. 2016-September IEEE Computer Society, 2016. p. 643-648 7560273.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Cai, R, Ren, A, Wang, Y & Yuan, B 2016, Memristor-based discrete fourier transform for improving performance and energy efficiency. in Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. vol. 2016-September, 7560273, IEEE Computer Society, pp. 643-648, 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, United States, 7/11/16. https://doi.org/10.1109/ISVLSI.2016.124

@inproceedings{09b854271bae48928df78a541862d907,

title = "Memristor-based discrete fourier transform for improving performance and energy efficiency",

abstract = "Memristor has emerged as one of the most promising candidates for the fundamental device in the beyond-CMOS era. With their unique advantage on implementing low-power high-speed matrix multiplication, memristors have shown great and vast potentiality in many specific applications. This paper, for the first time, investigates the hardware design of DFT using memristors. Two implementations of DFT using memristors have been presented for effectively trading-off between hardware complexity and computing speed. Simulation results show that as compared to the conventional CMOS-based design, the proposed memristor-based design enables significant reduction in computation latency and improvement in power efficiency with very low inaccuracy. Simulation results show that the proposed memristor-based implementation could reach up to 10X improvement in speed and 109.8X reduction in power efficiency compared to CMOS-based design.",

keywords = "DFT, Memristor, Memristor Crossbar",

author = "Ruizhe Cai and Ao Ren and Yanzhi Wang and Bo Yuan",

year = "2016",

month = sep,

day = "2",

doi = "10.1109/ISVLSI.2016.124",

language = "English (US)",

volume = "2016-September",

pages = "643--648",

booktitle = "Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016",

publisher = "IEEE Computer Society",

address = "United States",

note = "15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 ; Conference date: 11-07-2016 Through 13-07-2016",

}

TY - GEN

T1 - Memristor-based discrete fourier transform for improving performance and energy efficiency

AU - Cai, Ruizhe

AU - Ren, Ao

AU - Wang, Yanzhi

AU - Yuan, Bo

PY - 2016/9/2

Y1 - 2016/9/2

N2 - Memristor has emerged as one of the most promising candidates for the fundamental device in the beyond-CMOS era. With their unique advantage on implementing low-power high-speed matrix multiplication, memristors have shown great and vast potentiality in many specific applications. This paper, for the first time, investigates the hardware design of DFT using memristors. Two implementations of DFT using memristors have been presented for effectively trading-off between hardware complexity and computing speed. Simulation results show that as compared to the conventional CMOS-based design, the proposed memristor-based design enables significant reduction in computation latency and improvement in power efficiency with very low inaccuracy. Simulation results show that the proposed memristor-based implementation could reach up to 10X improvement in speed and 109.8X reduction in power efficiency compared to CMOS-based design.

AB - Memristor has emerged as one of the most promising candidates for the fundamental device in the beyond-CMOS era. With their unique advantage on implementing low-power high-speed matrix multiplication, memristors have shown great and vast potentiality in many specific applications. This paper, for the first time, investigates the hardware design of DFT using memristors. Two implementations of DFT using memristors have been presented for effectively trading-off between hardware complexity and computing speed. Simulation results show that as compared to the conventional CMOS-based design, the proposed memristor-based design enables significant reduction in computation latency and improvement in power efficiency with very low inaccuracy. Simulation results show that the proposed memristor-based implementation could reach up to 10X improvement in speed and 109.8X reduction in power efficiency compared to CMOS-based design.

KW - DFT

KW - Memristor

KW - Memristor Crossbar

UR - http://www.scopus.com/inward/record.url?scp=84988926412&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84988926412&partnerID=8YFLogxK

U2 - 10.1109/ISVLSI.2016.124

DO - 10.1109/ISVLSI.2016.124

M3 - Conference contribution

AN - SCOPUS:84988926412

VL - 2016-September

SP - 643

EP - 648

BT - Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016

PB - IEEE Computer Society

T2 - 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016

Y2 - 11 July 2016 through 13 July 2016

ER -

Memristor-based discrete fourier transform for improving performance and energy efficiency

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Keywords

ASJC Scopus subject areas

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