Maximizing the performance of NoC-based MPSoCs under total power and power density constraints

Alireza Shafaei, Yanzhi Wang, Lizhong Chen, Shuang Chen, Massoud Pedram

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

This paper presents an application mapping problem, which aims to maximize the performance of NoC-based multi-processor system-on-chip (MPSoC) designs without violating the total power and power density budgets of the chip, while maintaining the routability of all communicating cores. The mapping problem also accounts for the fact that, due to process variations, speed and leakage power characteristics of cores and routers may be quite different from one another. The problem is formulated as a mixed-integer, non-linear mathematical program, and solved heuristically by a polynomial-time combinatorial algorithm. The proposed algorithm achieves 34% (31%) on average and 52% (49%) maximum performance improvement under 16nm planar CMOS (7nm FinFET) technology when mapping different applications with different number of tasks to a 64-core processor compared with the baseline algorithms.

Original languageEnglish (US)
Title of host publicationProceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016
PublisherIEEE Computer Society
Pages49-56
Number of pages8
Volume2016-May
ISBN (Electronic)9781509012138
DOIs
StatePublished - May 25 2016
Event17th International Symposium on Quality Electronic Design, ISQED 2016 - Santa Clara, United States
Duration: Mar 15 2016Mar 16 2016

Other

Other17th International Symposium on Quality Electronic Design, ISQED 2016
CountryUnited States
CitySanta Clara
Period3/15/163/16/16

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Shafaei, A., Wang, Y., Chen, L., Chen, S., & Pedram, M. (2016). Maximizing the performance of NoC-based MPSoCs under total power and power density constraints. In Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016 (Vol. 2016-May, pp. 49-56). [7479175] IEEE Computer Society. https://doi.org/10.1109/ISQED.2016.7479175