Improving RHS for energy saving

Qing Xu Deng, Fan Xin Kong, Hui Ting Xu, Xi Jin

Research output: Contribution to journalArticlepeer-review


Several improvements for ES-RHS algorithm are proposed by taking account of both the schedulability test and the time/energy overhead due to processor mode switching. A new schedulability test condition which heavily reduces the pessimism is first presented. Then, the power consumption can be reduced by merging the tasks together and eliminating the idle mode of processor, thus decreasing greatly the number of mode switching acts. Furthermore, the constraint on the sleeping time of the processor in every harmonic period is relaxed. Simulation results indicate that the proposed algorithm reduce the power consumption by 17%~65% and is applicable to more types of processors in comparison to ES-RHS.

Original languageEnglish (US)
Pages (from-to)477-481
Number of pages5
JournalDongbei Daxue Xuebao/Journal of Northeastern University
Issue number4
StatePublished - Apr 2010
Externally publishedYes


  • Dynamic voltage scaling (DVS)
  • ES-RHS algorithm
  • Power consumption
  • Real-time system
  • Scheduling

ASJC Scopus subject areas

  • General Engineering
  • Computer Science Applications
  • Applied Mathematics


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