Full-chip leakage current estimation based on statistical sampling techniques

Shaobo Liu, Qinru Qiu, Qing Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

In this paper, we propose statistical sampling techniques for estimating full-chip leakage current under process variations. The stratified random sampling procedures are used to estimate the mean and variance of the full-chip leakage, under intra-die and inter-die process variations. Statistical quantile estimation method is then applied to estimate the cumulative distribution function. Experimental results show that, comparing to simple random sampling, the proposed approaches improve the estimation speed by 2.7X, on average.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2008
Subtitle of host publicationProceedings of the 2008 ACM Great Lakes Symposium on VLSI
Pages391-394
Number of pages4
DOIs
StatePublished - Dec 2 2008
Externally publishedYes
EventGLSVLSI 2008: 18th ACM Great Lakes Symposium on VLSI 2008 - Orlando, FL, United States
Duration: Mar 4 2008Mar 6 2008

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Other

OtherGLSVLSI 2008: 18th ACM Great Lakes Symposium on VLSI 2008
CountryUnited States
CityOrlando, FL
Period3/4/083/6/08

Keywords

  • Leakage estimation
  • Statistical sampling
  • VLSI

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Liu, S., Qiu, Q., & Wu, Q. (2008). Full-chip leakage current estimation based on statistical sampling techniques. In GLSVLSI 2008: Proceedings of the 2008 ACM Great Lakes Symposium on VLSI (pp. 391-394). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI). https://doi.org/10.1145/1366110.1366203