Fault Tolerance Techniques for Systolic Arrays

Jacob A. Abraham, Prithviraj Banerjee, Chien Yi Chen, W. Kent Fuchs, Sy Yen Kuo, A. L. Narasimha Reddy

Research output: Contribution to specialist publicationArticle

54 Scopus citations

Abstract

This article describes various techniques for fault tolerance that can be applied to systolic array architectures. The approach of algorithm-based fault tolerance is shown to be the natural one for such systems.

Original languageEnglish (US)
Pages65-75
Number of pages11
Volume20
No7
Specialist publicationComputer
DOIs
StatePublished - Jul 1987
Externally publishedYes

ASJC Scopus subject areas

  • Computer Science(all)

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  • Cite this

    Abraham, J. A., Banerjee, P., Chen, C. Y., Fuchs, W. K., Kuo, S. Y., & Narasimha Reddy, A. L. (1987). Fault Tolerance Techniques for Systolic Arrays. Computer, 20(7), 65-75. https://doi.org/10.1109/MC.1987.1663621