Evaluation of Excess Inductance and Capacitance of Microstrip Junctions

Tapan K. Sarkar; Zoran A. Mariević; J. B. Zhang

doi:10.1109/22.293585

Evaluation of Excess Inductance and Capacitance of Microstrip Junctions

Tapan K. Sarkar, Zoran A. Mariević, J. B. Zhang

Department of Electrical Engineering & Computer Science

Research output: Contribution to journal › Article › peer-review

20 Scopus citations

Abstract

Excess inductance and capacitance of various microstrip discontinuities (bends, impedance steps, and simple vias) are evaluated. For the inductance calculations, the structure is assumed to consist of perfectly conducting foils located in vacuum above a perfectly conducting ground plane. For the capacitance calculations, the structure is assumed to be embedded in a multilayered dielectric medium. The surface-current distribution for the excess inductance calculation and the surface-charge distribution for the capacitance calculation are evaluated numerically, solving integral equations based on the boundary conditions. Thereby, the conductor and dielectric surfaces are divided into a number of triangles, and the point-matching technique is used.

Original language	English (US)
Pages (from-to)	1095-1097
Number of pages	3
Journal	IEEE Transactions on Microwave Theory and Techniques
Volume	42
Issue number	6
DOIs	https://doi.org/10.1109/22.293585
State	Published - Jun 1994

ASJC Scopus subject areas

Radiation
Condensed Matter Physics
Electrical and Electronic Engineering

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@article{e66c1e10c5de4527a297ae962541b74c,

title = "Evaluation of Excess Inductance and Capacitance of Microstrip Junctions",

abstract = "Excess inductance and capacitance of various microstrip discontinuities (bends, impedance steps, and simple vias) are evaluated. For the inductance calculations, the structure is assumed to consist of perfectly conducting foils located in vacuum above a perfectly conducting ground plane. For the capacitance calculations, the structure is assumed to be embedded in a multilayered dielectric medium. The surface-current distribution for the excess inductance calculation and the surface-charge distribution for the capacitance calculation are evaluated numerically, solving integral equations based on the boundary conditions. Thereby, the conductor and dielectric surfaces are divided into a number of triangles, and the point-matching technique is used.",

author = "Sarkar, {Tapan K.} and Marievi{\'c}, {Zoran A.} and Zhang, {J. B.}",

year = "1994",

month = jun,

doi = "10.1109/22.293585",

language = "English (US)",

volume = "42",

pages = "1095--1097",

journal = "IEEE Transactions on Microwave Theory and Techniques",

issn = "0018-9480",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "6",

}

TY - JOUR

T1 - Evaluation of Excess Inductance and Capacitance of Microstrip Junctions

AU - Sarkar, Tapan K.

AU - Mariević, Zoran A.

AU - Zhang, J. B.

PY - 1994/6

Y1 - 1994/6

N2 - Excess inductance and capacitance of various microstrip discontinuities (bends, impedance steps, and simple vias) are evaluated. For the inductance calculations, the structure is assumed to consist of perfectly conducting foils located in vacuum above a perfectly conducting ground plane. For the capacitance calculations, the structure is assumed to be embedded in a multilayered dielectric medium. The surface-current distribution for the excess inductance calculation and the surface-charge distribution for the capacitance calculation are evaluated numerically, solving integral equations based on the boundary conditions. Thereby, the conductor and dielectric surfaces are divided into a number of triangles, and the point-matching technique is used.

AB - Excess inductance and capacitance of various microstrip discontinuities (bends, impedance steps, and simple vias) are evaluated. For the inductance calculations, the structure is assumed to consist of perfectly conducting foils located in vacuum above a perfectly conducting ground plane. For the capacitance calculations, the structure is assumed to be embedded in a multilayered dielectric medium. The surface-current distribution for the excess inductance calculation and the surface-charge distribution for the capacitance calculation are evaluated numerically, solving integral equations based on the boundary conditions. Thereby, the conductor and dielectric surfaces are divided into a number of triangles, and the point-matching technique is used.

UR - http://www.scopus.com/inward/record.url?scp=0028447123&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028447123&partnerID=8YFLogxK

U2 - 10.1109/22.293585

DO - 10.1109/22.293585

M3 - Article

AN - SCOPUS:0028447123

SN - 0018-9480

VL - 42

SP - 1095

EP - 1097

JO - IEEE Transactions on Microwave Theory and Techniques

JF - IEEE Transactions on Microwave Theory and Techniques

IS - 6

ER -

Evaluation of Excess Inductance and Capacitance of Microstrip Junctions

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