EFFICIENT CONCURRENT ERROR DETECTION IN PLAS AND ROMS.

Chien Yi Roger Chen, W. Kent Fuchs, Jacob A. Abraham

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

Efficient schemes are presented for concurrent detection of errors produced by physical failures during the normal operation of typical VLSI implementations of programmable logic arrays (PLAs) and read-only memories (ROMs). Comprehensive error detection is provided for both permanent and nonpermanent (transient/intermittent) faults. The schemes are based on general fault models and are applicable to various modified implementations of PLAs and ROMs. Fault avoidance for certain classes of failures is ensured by suggested mask-level design rules. A low-overhead solution is provided to the problem of concurrent error detection in a variety of VLSI logic arrays.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
PublisherIEEE Computer Society
Pages525-529
Number of pages5
ISBN (Print)0818606428
StatePublished - 1985
Externally publishedYes

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chen, C. Y. R., Fuchs, W. K., & Abraham, J. A. (1985). EFFICIENT CONCURRENT ERROR DETECTION IN PLAS AND ROMS. In Unknown Host Publication Title (pp. 525-529). IEEE Computer Society.