TY - GEN
T1 - Design, implementation and evaluation of parallel pipelined STAP on parallel computers
AU - Choudhary, Alok
AU - Liao, Wei keng
AU - Weiner, Donald
AU - Varshney, Pramod
AU - Linderman, Richard
AU - Linderman, Mark
PY - 1998/1/1
Y1 - 1998/1/1
N2 - This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particular, the paper describes the issues involved in parallelization, our approach to parallelization and performance results on an Intel Paragon. The paper also discusses the process of developing software for such an application on parallel computers when latency and throughput are both considered together and presents tradeoffs considered with respect to inter and intra-task communication and data redistribution. The results show that not only scalable performance was achieved for individual component tasks of STAP but linear speedups were obtained for the integrated task performance, both for latency as well as throughput. Results are presented for up to 236 compute nodes (limited by the machine size available to us). Another interesting observation made from the implementation results is that performance improvement due to the assignment of additional processors to one task can improve the performance of other tasks without any increase in the number of processors assigned to them. Normally, this cannot be predicted by theoretical analysis.
AB - This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particular, the paper describes the issues involved in parallelization, our approach to parallelization and performance results on an Intel Paragon. The paper also discusses the process of developing software for such an application on parallel computers when latency and throughput are both considered together and presents tradeoffs considered with respect to inter and intra-task communication and data redistribution. The results show that not only scalable performance was achieved for individual component tasks of STAP but linear speedups were obtained for the integrated task performance, both for latency as well as throughput. Results are presented for up to 236 compute nodes (limited by the machine size available to us). Another interesting observation made from the implementation results is that performance improvement due to the assignment of additional processors to one task can improve the performance of other tasks without any increase in the number of processors assigned to them. Normally, this cannot be predicted by theoretical analysis.
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U2 - 10.1109/IPPS.1998.669914
DO - 10.1109/IPPS.1998.669914
M3 - Conference contribution
AN - SCOPUS:0031650007
SN - 0818684046
T3 - Proceedings of the International Parallel Processing Symposium, IPPS
SP - 220
EP - 225
BT - Proceedings of the International Parallel Processing Symposium, IPPS
A2 - Anon, null
T2 - Proceedings of the 1998 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing
Y2 - 30 March 1998 through 3 April 1998
ER -