Abstract
In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RT-level power analysis. The proposed macro-model predicts not only the cycle-by-cycle power consumption of a module, but the power profile of the module over time. The proposed methodology consists of three steps: module equation form generation and variable selection, variable reduction, and population stratification. First order temporal correlations and spatial correlations of up to order 3 are considered to improve the estimation accuracy. Experimental results show that, the macro-models have 15 or less variables and exhibit <5% error in average power, and <15% errors in cycle-by-cycle power compared to circuit simulation results using Powermill.
Original language | English (US) |
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Title of host publication | International Symposium on Low Power Electronics and Design, Digest of Technical Papers |
Publisher | IEEE Computer Society |
Pages | 125-130 |
Number of pages | 6 |
State | Published - 1997 |
Externally published | Yes |
Event | Proceedings of the 1997 International Symposium on Low Power Electronics and Design - Monterey, CA, USA Duration: Aug 18 1997 → Aug 20 1997 |
Other
Other | Proceedings of the 1997 International Symposium on Low Power Electronics and Design |
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City | Monterey, CA, USA |
Period | 8/18/97 → 8/20/97 |
ASJC Scopus subject areas
- General Engineering