Artifical intelligence approach to PLA optimization

A. M. Kabakcioglu, P. K. Varshney, C. R.P. Hartmann

Research output: Chapter in Book/Entry/PoemConference contribution

Abstract

Programmable-logic-array (PLA) optimization can be achieved by using heuristic two-level switching-function minimization algorithms. The authors introduce a novel approach to the heuristic-switching-function minimization. The approach is based on formulating the problem as a state-space search. Several heuristic evaluation functions are used to guide the search, which is realized by constructing a binary decision tree.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE Computer Society
Pages1861-1864
Number of pages4
ISBN (Print)9517212402
StatePublished - 1988
Externally publishedYes

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2
ISSN (Print)0271-4310

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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