Analysis of deeply scaled multi-gate devices with design centering across multiple voltage regimes

Shuang Chen, Xue Lin, Alireza Shafaei, Yanzhi Wang, Massoud Pedram

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

This work aims at finding a design-centered FinFET model with small geometric for circuit and system level simulations and performance prediction of next-generation systems on chip. A number of devices including the ITRS 7nm multi-gate device are used as examples. While adjusting design parameters for the transistors, a design centering step is included in which the gate workfunction is carefully adjusted to account for the increased power dissipation due to gate length variations. Using a cross-layer framework, compact device models and standard cell libraries are built up for circuit-level and system-level simulations. Simulation results of SRAM cells as well as some combinational/sequential benchmark circuits are shown to compare the device performance in different technologies.

Original languageEnglish (US)
Title of host publication2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509002597
DOIs
StatePublished - Nov 20 2015
Externally publishedYes
EventIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 - Rohnert Park, United States
Duration: Oct 5 2015Oct 8 2015

Other

OtherIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015
CountryUnited States
CityRohnert Park
Period10/5/1510/8/15

Keywords

  • Design centering
  • FinFET
  • Near-threshold computing
  • SRAM

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Chen, S., Lin, X., Shafaei, A., Wang, Y., & Pedram, M. (2015). Analysis of deeply scaled multi-gate devices with design centering across multiple voltage regimes. In 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 [7333517] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/S3S.2015.7333517