An empirical study on NVM-based block I/O caches

Geonhee Lee; Hyeon Gyu Lee; Juwon Lee; Bryan S. Kim; Sang Lyul Min

doi:10.1145/3265723.3265741

An empirical study on NVM-based block I/O caches

Geonhee Lee, Hyeon Gyu Lee, Juwon Lee, Bryan S. Kim, Sang Lyul Min

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper presents an empirical study on block I/O caches when combining the performance benefits of emerging NVM storages and the cost-effectiveness of secondary storages. Current state-of-the-art I/O caching solutions are designed around the performance characteristics of SSDs, and our study reveals that using them with NVM storages does not fully reap the benefits of I/O devices with near-DRAM latencies. With fast NVM storages, locating data must be handled efficiently, but the sophisticated yet complex data structures used in existing designs impose significant overheads by substantially increasing the hit time. As this design approach is suboptimal for accessing fast I/O devices, we suggest several architectural designs to exploit the performance of NVM storages.

Original language	English (US)
Title of host publication	Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018
Publisher	Association for Computing Machinery, Inc
ISBN (Electronic)	9781450360067
DOIs	https://doi.org/10.1145/3265723.3265741
State	Published - Aug 27 2018
Externally published	Yes
Event	9th Asia-Pacific Workshop on Systems, APSys 2018 - Jeju Island, Korea, Republic of Duration: Aug 27 2018 → Aug 28 2018

Publication series

Name	Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018

Conference

Conference	9th Asia-Pacific Workshop on Systems, APSys 2018
Country/Territory	Korea, Republic of
City	Jeju Island
Period	8/27/18 → 8/28/18

Keywords

I/O cache
NVDIMM
NVM
Storage stack

ASJC Scopus subject areas

Hardware and Architecture
Computer Networks and Communications

Access to Document

10.1145/3265723.3265741

Cite this

An empirical study on NVM-based block I/O caches. / Lee, Geonhee; Lee, Hyeon Gyu; Lee, Juwon et al.

Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018. Association for Computing Machinery, Inc, 2018. 11 (Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, G, Lee, HG, Lee, J, Kim, BS & Min, SL 2018, An empirical study on NVM-based block I/O caches. in Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018., 11, Proceedings of the 9th Asia-Pacific Workshop on Systems, APSys 2018, Association for Computing Machinery, Inc, 9th Asia-Pacific Workshop on Systems, APSys 2018, Jeju Island, Korea, Republic of, 8/27/18. https://doi.org/10.1145/3265723.3265741

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abstract = "This paper presents an empirical study on block I/O caches when combining the performance benefits of emerging NVM storages and the cost-effectiveness of secondary storages. Current state-of-the-art I/O caching solutions are designed around the performance characteristics of SSDs, and our study reveals that using them with NVM storages does not fully reap the benefits of I/O devices with near-DRAM latencies. With fast NVM storages, locating data must be handled efficiently, but the sophisticated yet complex data structures used in existing designs impose significant overheads by substantially increasing the hit time. As this design approach is suboptimal for accessing fast I/O devices, we suggest several architectural designs to exploit the performance of NVM storages.",

keywords = "I/O cache, NVDIMM, NVM, Storage stack",

author = "Geonhee Lee and Lee, {Hyeon Gyu} and Juwon Lee and Kim, {Bryan S.} and Min, {Sang Lyul}",

note = "Funding Information: We thank our shepherd Cheng Li and the anonymous reviewers for their constructive and insightful comments. This work was supported in part the National Research Foundation of Korea under the BK21 Plus for Pioneers in Innovative Computing (21A20151113068) and the PF Class Heterogeneous High Performance Computer Development (NRF-2016M3C4A7952587). Institute of Computer Technology at Seoul National University provided the research facilities for this study. Publisher Copyright: {\textcopyright} 2018 Association for Computing Machinery.; 9th Asia-Pacific Workshop on Systems, APSys 2018 ; Conference date: 27-08-2018 Through 28-08-2018",

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N1 - Funding Information: We thank our shepherd Cheng Li and the anonymous reviewers for their constructive and insightful comments. This work was supported in part the National Research Foundation of Korea under the BK21 Plus for Pioneers in Innovative Computing (21A20151113068) and the PF Class Heterogeneous High Performance Computer Development (NRF-2016M3C4A7952587). Institute of Computer Technology at Seoul National University provided the research facilities for this study. Publisher Copyright: © 2018 Association for Computing Machinery.

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N2 - This paper presents an empirical study on block I/O caches when combining the performance benefits of emerging NVM storages and the cost-effectiveness of secondary storages. Current state-of-the-art I/O caching solutions are designed around the performance characteristics of SSDs, and our study reveals that using them with NVM storages does not fully reap the benefits of I/O devices with near-DRAM latencies. With fast NVM storages, locating data must be handled efficiently, but the sophisticated yet complex data structures used in existing designs impose significant overheads by substantially increasing the hit time. As this design approach is suboptimal for accessing fast I/O devices, we suggest several architectural designs to exploit the performance of NVM storages.

AB - This paper presents an empirical study on block I/O caches when combining the performance benefits of emerging NVM storages and the cost-effectiveness of secondary storages. Current state-of-the-art I/O caching solutions are designed around the performance characteristics of SSDs, and our study reveals that using them with NVM storages does not fully reap the benefits of I/O devices with near-DRAM latencies. With fast NVM storages, locating data must be handled efficiently, but the sophisticated yet complex data structures used in existing designs impose significant overheads by substantially increasing the hit time. As this design approach is suboptimal for accessing fast I/O devices, we suggest several architectural designs to exploit the performance of NVM storages.

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KW - Storage stack

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An empirical study on NVM-based block I/O caches

Abstract

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Conference

Keywords

ASJC Scopus subject areas

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