An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing

Xiaolong Ma, Yipeng Zhang, Geng Yuan, Ao Ren, Zhe Li, Jie Han, Jingtong Hu, Yanzhi Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Scopus citations

Abstract

With recent trend of wearable devices and Internet of Things (IoTs), it becomes attractive to develop hardware-based deep convolutional neural networks (DCNNs) for embedded applications, which require low power/energy consumptions and small hardware footprints. Recent works demonstrated that the Stochastic Computing (SC) technique can radically simplify the hardware implementation of arithmetic units and has the potential to satisfy the stringent power requirements in embedded devices. However, in these works, the memory design optimization is neglected for weight storage, which will inevitably result in large hardware cost. Moreover, if conventional volatile SRAM or DRAM cells are utilized for weight storage, the weights need to be re-initialized whenever the DCNN platform is re-started. In order to overcome these limitations, in this work we adopt an emerging non-volatile Domain-Wall Memory (DWM), which can achieve ultra-high density, to replace SRAM for weight storage in SC-based DCNNs. We propose DW-CNN, the first comprehensive design optimization framework of DWM-based weight storage method. We derive the optimal memory type, precision, and organization, as well as whether to store binary or stochastic numbers. We present effective resource sharing scheme for DWM-based weight storage in the convolutional and fully-connected layers of SC-based DCNNs to achieve a desirable balance among area, power (energy) consumption, and application-level accuracy.

Original languageEnglish (US)
Title of host publication2018 19th International Symposium on Quality Electronic Design, ISQED 2018
PublisherIEEE Computer Society
Pages314-321
Number of pages8
ISBN (Electronic)9781538612149
DOIs
StatePublished - May 9 2018
Event19th International Symposium on Quality Electronic Design, ISQED 2018 - Santa Clara, United States
Duration: Mar 13 2018Mar 14 2018

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2018-March
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other19th International Symposium on Quality Electronic Design, ISQED 2018
CountryUnited States
CitySanta Clara
Period3/13/183/14/18

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Ma, X., Zhang, Y., Yuan, G., Ren, A., Li, Z., Han, J., Hu, J., & Wang, Y. (2018). An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing. In 2018 19th International Symposium on Quality Electronic Design, ISQED 2018 (pp. 314-321). (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2018-March). IEEE Computer Society. https://doi.org/10.1109/ISQED.2018.8357306