Accurate modeling of the delay and energy overhead of dynamic voltage and frequency scaling in modern microprocessors

Sangyoung Park, Jaehyun Park, Donghwa Shin, Yanzhi Wang, Qing Xie, Massoud Pedram, Naehyuck Chang

Research output: Contribution to journalArticle

65 Citations (Scopus)

Abstract

Dynamic voltage and frequency scaling (DVFS) has been studied for well over a decade. Nevertheless, existing DVFS transition overhead models suffer from significant inaccuracies; for example, by incorrectly accounting for the effect of DC-DC converters, frequency synthesizers, voltage, and frequency change policies on energy losses incurred during mode transitions. Incorrect and/or inaccurate DVFS transition overhead models prevent one from determining the precise break-even time and thus forfeit some of the energy saving that is ideally achievable. This paper introduces accurate DVFS transition overhead models for both energy consumption and delay. In particular, we redefine the DVFS transition overhead including the underclocking-related losses in a DVFS-enabled microprocessor, additional inductor IR losses, and power losses due to discontinuous-mode DC-DC conversion. We report the transition overheads for a desktop, a mobile and a low-power representative processor. We also present DVFS transition overhead macromodel for use by high-level DVFS schedulers.

Original languageEnglish (US)
Article number6504549
Pages (from-to)695-708
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume32
Issue number5
DOIs
StatePublished - 2013
Externally publishedYes

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Microprocessor chips
Frequency synthesizers
Voltage scaling
Dynamic frequency scaling
DC-DC converters
Energy dissipation
Energy conservation
Energy utilization
Electric potential

Keywords

  • Delay and energy overhead
  • dynamic voltage and frequency scaling (DVFS)
  • macromodel

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design
  • Software

Cite this

Accurate modeling of the delay and energy overhead of dynamic voltage and frequency scaling in modern microprocessors. / Park, Sangyoung; Park, Jaehyun; Shin, Donghwa; Wang, Yanzhi; Xie, Qing; Pedram, Massoud; Chang, Naehyuck.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 32, No. 5, 6504549, 2013, p. 695-708.

Research output: Contribution to journalArticle

Park, Sangyoung ; Park, Jaehyun ; Shin, Donghwa ; Wang, Yanzhi ; Xie, Qing ; Pedram, Massoud ; Chang, Naehyuck. / Accurate modeling of the delay and energy overhead of dynamic voltage and frequency scaling in modern microprocessors. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2013 ; Vol. 32, No. 5. pp. 695-708.
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