A tool to generate models based on behavioral IBIS models

B. S. Deepaksubramanyan, C. Y.Roger Chen, Adrian Nunez

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Input/Output Buffer Information Specification (IBIS) behavioral models are widely used for circuit-level signal integrity (SI) analysis due to its fast simulation speed and good accuracy. This work presents a tool to generate models of circuits specified by IBIS models. The model generation tool estimates poles, rise time and fall time of a circuit specified by IBIS models. The method consists of two steps; first regression analysis is performed on IBIS data with Weibull distribution function (WCDF) as the regression function. Based on the estimated parameter values, rise time and fall time values are obtained. The second step involves matching moments of WCDF to circuit moments and obtaining the estimated poles of the system. The method is generic and is scalable in nanometer CMOS. CMOS inverters have been used to demonstrate the methodology.

Original languageEnglish (US)
Title of host publication2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Pages234-237
Number of pages4
DOIs
StatePublished - Oct 16 2012
Event2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012 - Boise, ID, United States
Duration: Aug 5 2012Aug 8 2012

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Other

Other2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
CountryUnited States
CityBoise, ID
Period8/5/128/8/12

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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