A Preprocessor for Improving Channel Routing Hierarchical Pin Permutation

C. Y.Roger Chen, Bradley S. Carlson, Cliff Yungchin Hou

Research output: Contribution to journalArticlepeer-review


In standard cell design, many cell terminals and gates are permutable, and it is important for a channel router to take advantage of this to obtain better results. An efficient hierarchical algorithm is presented to determine the proper positions of permutable gates and cell terminals such that the results of the subsequent channel routing can be significantly improved. Experimental results show that our proposed algorithm considerably reduces the number of tracks and vias, and its time complexity is linear in the number of cell terminals.

Original languageEnglish (US)
Pages (from-to)896-903
Number of pages8
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number7
StatePublished - Jul 1995

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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