A new architecture for MPEG-2 real-time encoding

Mansour Zuair; Dikran Meliksetian; C. Y. Roger Chen

doi:10.1117/12.263510

A new architecture for MPEG-2 real-time encoding

Mansour Zuair, Dikran Meliksetian, C. Y. Roger Chen

Department of Electrical Engineering & Computer Science

Research output: Contribution to journal › Conference Article › peer-review

Abstract

A new architecture for real-time MPEG-2 encoding/decoding is presented in this paper. This architecture is based on an array of TI MVP's. The main feature of this architecture is it's programmability. The inherent parallelism of the MPEG-2 algorithm is investigated in order to map it to the processor array. An I/O algorithm for the major encoding function, motion estimation, is developed to demonstrate the possibility of overlapping processing and I/O.

Original language	English (US)
Pages (from-to)	170-181
Number of pages	12
Journal	Proceedings of SPIE - The International Society for Optical Engineering
Volume	3021
DOIs	https://doi.org/10.1117/12.263510
State	Published - Jan 17 1997
Event	Multimedia Hardware Architectures 1997 - San Jose, United States Duration: Feb 8 1997 → Feb 14 1997

Keywords

MPEG-2
Motion estimation
Multimedia video processor (MVP)
Real-time

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Computer Science Applications
Applied Mathematics
Electrical and Electronic Engineering

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10.1117/12.263510

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abstract = "A new architecture for real-time MPEG-2 encoding/decoding is presented in this paper. This architecture is based on an array of TI MVP's. The main feature of this architecture is it's programmability. The inherent parallelism of the MPEG-2 algorithm is investigated in order to map it to the processor array. An I/O algorithm for the major encoding function, motion estimation, is developed to demonstrate the possibility of overlapping processing and I/O.",

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AU - Meliksetian, Dikran

AU - Roger Chen, C. Y.

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Y1 - 1997/1/17

N2 - A new architecture for real-time MPEG-2 encoding/decoding is presented in this paper. This architecture is based on an array of TI MVP's. The main feature of this architecture is it's programmability. The inherent parallelism of the MPEG-2 algorithm is investigated in order to map it to the processor array. An I/O algorithm for the major encoding function, motion estimation, is developed to demonstrate the possibility of overlapping processing and I/O.

AB - A new architecture for real-time MPEG-2 encoding/decoding is presented in this paper. This architecture is based on an array of TI MVP's. The main feature of this architecture is it's programmability. The inherent parallelism of the MPEG-2 algorithm is investigated in order to map it to the processor array. An I/O algorithm for the major encoding function, motion estimation, is developed to demonstrate the possibility of overlapping processing and I/O.

KW - MPEG-2

KW - Motion estimation

KW - Multimedia video processor (MVP)

KW - Real-time

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SP - 170

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JO - Proceedings of SPIE - The International Society for Optical Engineering

JF - Proceedings of SPIE - The International Society for Optical Engineering

T2 - Multimedia Hardware Architectures 1997

Y2 - 8 February 1997 through 14 February 1997

ER -

A new architecture for MPEG-2 real-time encoding

Abstract

Keywords

ASJC Scopus subject areas

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