TY - GEN
T1 - A low-cost, tiled embedded smart camera system for computer vision applications
AU - Leon-Salas, W. D.
AU - Velipasalar, Senem
AU - Schemm, Nathan
AU - Balkir, Sina
PY - 2007
Y1 - 2007
N2 - Smart cameras with embedded processors will find great use in sensor network applications since they have local processing capabilities. It is very important to consider complexity, area requirements, power consumption and cost when designing image sensor chips for embedded smart cameras. To obtain a higher-resolution image of a region of interest, and address the above issues, we propose to tile multiple lower-resolution, lower-cost embedded smart cameras instead of fabricating a higher-resolution sensor as a single chip. In addition to complexity, area, power and cost advantages, the presented scheme has the benefit of having hierarchical levels of processing, and distributed computation across the tiles. We present our low-resolution smart cameras, which have custom-designed image sensor chips. Then, we provide a detailed comparison of fabricating a higher-resolution sensor as a single chip and tiling lower-resolution embedded smart cameras in terms of bandwidth, clock frequency, area, power, cost and global computations.
AB - Smart cameras with embedded processors will find great use in sensor network applications since they have local processing capabilities. It is very important to consider complexity, area requirements, power consumption and cost when designing image sensor chips for embedded smart cameras. To obtain a higher-resolution image of a region of interest, and address the above issues, we propose to tile multiple lower-resolution, lower-cost embedded smart cameras instead of fabricating a higher-resolution sensor as a single chip. In addition to complexity, area, power and cost advantages, the presented scheme has the benefit of having hierarchical levels of processing, and distributed computation across the tiles. We present our low-resolution smart cameras, which have custom-designed image sensor chips. Then, we provide a detailed comparison of fabricating a higher-resolution sensor as a single chip and tiling lower-resolution embedded smart cameras in terms of bandwidth, clock frequency, area, power, cost and global computations.
KW - Area
KW - CMOS imager
KW - Cost
KW - Embedded processor
KW - High resolution
KW - Power consumption
KW - Smart camera
KW - Tiling
UR - http://www.scopus.com/inward/record.url?scp=47349109313&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=47349109313&partnerID=8YFLogxK
U2 - 10.1109/ICDSC.2007.4357515
DO - 10.1109/ICDSC.2007.4357515
M3 - Conference contribution
AN - SCOPUS:47349109313
SN - 1424413540
SN - 9781424413546
T3 - 2007 1st ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC
SP - 125
EP - 131
BT - 2007 1st ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC
T2 - 2007 First ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC-07
Y2 - 25 September 2007 through 28 September 2007
ER -