Find Research Outputs

Search concepts
Selected Filters
2016
6 Citations (Scopus)

Leakage power reduction using the body bias and pin reordering technique

Chun, J. W. & Chen, C. Y. R., Jan 18 2016, In : IEICE Electronics Express. 13, 3

Research output: Contribution to journalLetter

leakage
Networks (circuits)
CMOS
Electric power utilization
optimization
3 Citations (Scopus)

Transistor and pin reordering for leakage reduction in CMOS circuits

Chun, J. W. & Chen, C. Y. R., Jul 1 2016, In : Microelectronics Journal. 53, p. 25-34 10 p.

Research output: Contribution to journalArticle

Leakage currents
CMOS
Transistors
leakage
transistors