7.5 A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm2and 6T HBST-TRAM-Based 2D Data-Reuse Architecture

Jinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung Ning Tu, Yi Ju Chen, Ao Ren, Yanzhi Wang, Meng Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

23 Scopus citations

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