Abstract
FinFET device has been proposed as a promising substitute for the traditional bulk CMOS-based device at the nanoscale, due to its extraordinary properties such as improved channel controllability, high ON/OFF current ratio, reduced short-channel effects, and relative immunity to gate line-edge roughness. In addition, the near-ideal subthreshold behavior indicates the potential application of FinFET circuits in the near-threshold supply voltage regime, which consumes an order of magnitude less energy than the regular strong-inversion circuits operating in the super-threshold supply voltage regime. This paper presents a design flow of creating standard cells by using the FinFET 5nm technology node, including both near-threshold and super-threshold operations, and building a Liberty-format standard cell library. The circuit synthesis results of various combinational and sequential circuits based on the 5nm FinFET standard cell library show up to 40X circuit speed improvement and three orders of magnitude energy reduction compared to those of 45nm bulk CMOS technology.
Original language | English (US) |
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Title of host publication | Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI |
Publisher | IEEE Computer Society |
Pages | 424-429 |
Number of pages | 6 |
ISBN (Electronic) | 9781479937639 |
DOIs | |
State | Published - Sep 18 2014 |
Externally published | Yes |
Event | 2014 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014 - Tampa, United States Duration: Jul 9 2014 → Jul 11 2014 |
Other
Other | 2014 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014 |
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Country/Territory | United States |
City | Tampa |
Period | 7/9/14 → 7/11/14 |
Keywords
- 5nm technology
- FinFET
- near-threshold computing
- performance
- power consumption
- standard cell library
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering
- Electrical and Electronic Engineering