• 592 Citations
  • 13 h-Index
1985 …2016

Research output per year

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Research Output

Leakage power reduction using the body bias and pin reordering technique

Chun, J. W. & Chen, C. Y. R., Jan 18 2016, In : IEICE Electronics Express. 13, 3

Research output: Contribution to journalLetter

  • 6 Scopus citations

    Transistor and pin reordering for leakage reduction in CMOS circuits

    Chun, J. W. & Chen, C. Y. R., Jul 1 2016, In : Microelectronics Journal. 53, p. 25-34 10 p.

    Research output: Contribution to journalArticle

  • 3 Scopus citations

    Lookup table based discrete gate sizing for delay minimization with modified elmore delay model

    Xie, J. & Chen, C. Y. R., May 20 2015, GLSVLSI 2015 - 25th 2015 Great Lakes Symposium on VLSI. Association for Computing Machinery, Vol. 20-22-May-2015. p. 361-366 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 2 Scopus citations

    A tool to generate models based on behavioral IBIS models

    Deepaksubramanyan, B. S., Chen, C. Y. R. & Nunez, A., 2012, Midwest Symposium on Circuits and Systems. p. 234-237 4 p. 6292000

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 2 Scopus citations

    A novel leakage power reduction technique for CMOS circuit design

    Chun, J. W. & Chen, C. Y. R., 2010, 2010 International SoC Design Conference, ISOCC 2010. p. 119-122 4 p. 5682957

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 19 Scopus citations